DocumentCode :
1322078
Title :
Integration of Tantalum Pentoxide Capacitors With Through-Silicon Vias
Author :
Tegueu, Alphonse Kamto ; Liu, Yang ; Jacob, Susan ; Glover, Michael D. ; Schaper, Leonard W. ; Burkett, Susan L.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Alabama, Tuscaloosa, AL, USA
Volume :
1
Issue :
10
fYear :
2011
Firstpage :
1508
Lastpage :
1516
Abstract :
Metal filled through-silicon vias (TSVs) allow devices to be connected using a 3-D approach. Optimizing and refining this technology has been a focus for the semiconductor industry the past few years because of the need for novel integrated circuit (IC) packages that address the issues associated with increased functionality and performance while reducing size and costs for a growing number of defense and consumer electronic applications. Vertical interconnection using TSV technology has emerged as a convenient way to improve system performance. Integration of decoupling capacitors with TSVs represents an attractive alternative to conventional 2-D layouts to achieve miniaturization and increased density. Decoupling capacitors can be brought in close proximity to the active elements, thereby reducing their parasitic inductance and allowing higher clock rates. In this paper, capacitors with anodized tantalum oxide dielectric were integrated with TSVs and their performance was evaluated. Fabricated capacitors were found to exhibit satisfactory electrical properties before and after TSV processing although some changes in their properties were observed. The performance of these capacitors for applications such as high speed decoupling capacitors was evaluated by measuring resonant frequency, parasitic inductance, and parasitic resistance.
Keywords :
capacitors; consumer electronics; electric resistance; inductance; integrated circuit interconnections; integrated circuit packaging; semiconductor industry; tantalum compounds; three-dimensional integrated circuits; IC packages; TSV processing; TSV technology; Ta2O5; anodized tantalum oxide dielectric; consumer electronic applications; conventional 2D layouts; fabricated capacitors; high speed decoupling capacitors; higher clock rates; integrated circuit packages; metal filled through-silicon vias; parasitic inductance; parasitic resistance; resonant frequency; satisfactory electrical property; semiconductor industry; tantalum pentoxide capacitors; vertical interconnection; Capacitors; Copper; Leakage current; Sputtering; Through-silicon vias; 3-D integration with through silicon vias; ${rm Ta}_{2}{rm O}_{5}$ capacitors; copper electroplating; frequency response;
fLanguage :
English
Journal_Title :
Components, Packaging and Manufacturing Technology, IEEE Transactions on
Publisher :
ieee
ISSN :
2156-3950
Type :
jour
DOI :
10.1109/TCPMT.2011.2159973
Filename :
6020759
Link To Document :
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