DocumentCode :
1322179
Title :
Gate-First Metal-Gate/High- k n-MOSFETs With Deep Sub-nm Equivalent Oxide Thickness (0.58 nm) Fabricated With Sulfur-Implanted Schottky Source/Drain Using a Low-Temperature Pro
Author :
Suzuki, Masamichi ; Nishi, Yoshifumi ; Kinoshita, Atsuhiro
Author_Institution :
Corp. R&D Center, Toshiba Corp., Yokohama, Japan
Volume :
58
Issue :
11
fYear :
2011
Firstpage :
3674
Lastpage :
3677
Abstract :
Gate-first high-k/metal-gate n-MOSFETs with a deep subnanometer (sub-nm) equivalent oxide thickness (EOT) of 0.58 nm were successfully fabricated with Schottky source/drain contacts using a low-temperature process. The key to achieving such a thin EOT is the use of a low-temperature process for the NiSi Schottky source/drain formation. A sulfur implantation technique was used to overcome the Schottky barrier height between Si and NiSi, which is the main problem in NiSi Schottky source/drain fabrication. The advantage of Schottky source/drain MOSFETs over conventional source/drain MOSFETs was successfully demonstrated.
Keywords :
MOSFET; Schottky barriers; high-k dielectric thin films; ion implantation; metal-insulator boundaries; nanotechnology; nickel compounds; silicon compounds; sputter etching; sulphur; LaAlO3; NiSi:S; Schottky barrier; Schottky source-drain formation; deep subnanometer equivalent oxide thickness; gate first metal gate high-k n-MOSFET; implantation technique; low temperature process; size 0.58 nm; sulfur implanted Schottky Source-Drain; Annealing; High K dielectric materials; Logic gates; MOSFET circuits; MOSFETs; Metals; Silicon; $hbox{LaAlO}_{3}$; High-$k$; Schottky source/drain; metal gate; sulfur;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2011.2163939
Filename :
6020775
Link To Document :
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