Load balancing in a hybrid ATPG environment

Author

Daehn, Wilfried

Author_Institution

Sican GmbH, Hannover, West Germany

Volume

40

Issue

7

fYear

1991

fDate

7/1/1991 12:00:00 AM

Firstpage

878

Lastpage

882

Abstract

The problem of balancing the computational load between fault simulation and conventional ATPG (automatic test program generation) is treated. A rule for switching from probabilistic to deterministic test pattern computation is derived. The criterion is based on a model of monitoring of the simulation process and on an online estimation of the fault detection probabilities. Using these probabilities and the operation characteristics of the ATPG program, one can decide whether it is more efficient to continue fault simulation or to proceed with algorithmic test pattern computation. A prototype of the hybrid ATPG system was implemented on an Apollo DN3000. Compared to a conventional ATPG system, better coverage and shorter generation times were obtained

Keywords

automatic testing; logic testing; ATPG; Apollo DN3000; automatic test program generation; fault detection; fault simulation; monitoring; online estimation; test pattern computation; Automatic test pattern generation; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Digital filters; Load management; Read only memory; Test pattern generators; Very large scale integration;

fLanguage

English

Journal_Title

Computers, IEEE Transactions on

Publisher

ieee

ISSN

0018-9340

Type

jour

DOI

10.1109/12.83627

Filename

83627