DocumentCode :
1323054
Title :
Low-OSR Over-Ranging Hybrid ADC Incorporating Noise-Shaped Two-Step Quantizer
Author :
Rajaee, Omid ; Takeuchi, Seiji ; Aniya, Mitsuru ; Hamashita, Koichi ; Moon, Un-Ku
Author_Institution :
Qualcomm Inc., San Diego, CA, USA
Volume :
46
Issue :
11
fYear :
2011
Firstpage :
2458
Lastpage :
2468
Abstract :
A noise-shaped two-step ADC is presented in this paper. This ADC exploits residue feedback and a new capacitor/opamp sharing scheme to achieve high order noise shaping with minimal design complexity. The application of the proposed architecture in low power Delta-Sigma modulators is studied in this paper. A prototype ADC is fabricated in a 0.18 μm CMOS process. With a 1.56 MHz bandwidth (8x OSR), 2.6 mW analog power consumption, and 1.2 V analog supply voltage, the measured dynamic range and SNDR of this prototype IC are 78 dB and 75 dB.
Keywords :
analogue-digital conversion; convertors; delta-sigma modulation; low-power electronics; Low-OSR over-ranging hybrid ADC; bandwidth 1.56 MHz; low power delta-sigma modulators; noise figure 75 dB; noise figure 78 dB; noise-shaped two-step quantizer; power 2.6 mW; residue feedback; voltage 1.2 V; Capacitors; Delay; Modulation; Noise; Noise shaping; Quantization; Transfer functions; Delta-sigma modulation; feedback DAC; loop filter; noise shaping; oversampling converters; pipelined analog-to-digital converters; switched-capacitor circuits;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2011.2164293
Filename :
6021344
Link To Document :
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