Title :
Horizontal demand prefetching: A novel approach to eliminating the jump problem
Author :
McCrackin, D.C. ; Szabados, B.
Author_Institution :
Dept. of Electr. & Comput. Eng., McMaster Univ., Hamilton, Ont., Canada
fDate :
7/1/1991 12:00:00 AM
Abstract :
The principle of a novel prefetching strategy, horizontal demand prefetching, is presented. This mechanism allows deep prefetching without jump-related misses by prefetching shallowly across several independent streams in a horizontal fashion. Multistream processors using this technique can achieve very high memory utilization. The mechanism supports very efficient multitasking and hardware process synchronization. The structure and performance of a prototype minicomputer using this mechanism are presented.
Keywords :
computer architecture; instruction sets; minicomputers; pipeline processing; computer architecture; deep prefetching; efficient multitasking; hardware process synchronization; horizontal demand prefetching; independent streams; instruction prefetching; instruction sets; jump-related misses; pipeline processing; prototype minicomputer; Clocks; Context; Delays; Prefetching; Prototypes; Registers;
Journal_Title :
Electrical and Computer Engineering, Canadian Journal of
DOI :
10.1109/CJECE.1991.6592942
