• DocumentCode
    132406
  • Title

    An inductive-switching loss model accounting for source inductance and switching loop inductance

  • Author

    Zhiyang Chen

  • Author_Institution
    PowerFET Div., ON Semicond., Phoenix, AZ, USA
  • fYear
    2014
  • fDate
    16-20 March 2014
  • Firstpage
    497
  • Lastpage
    504
  • Abstract
    It is well known that that source inductance could significantly increase turn-on and turn-off time, and therefore increase switching power loss. Also, it is well understood that switching loop inductance could reduce voltage stress during turn-on and increase voltage stress during turn-off. In this paper, a new inductive switching loss model that includes source inductance and switching loop inductance has been derived and thoroughly analyzed. The new model shows that source inductance causes a “visual gate charge”, which is equivalent to physical gate charge, when look from the driver. For high current switching conditions, the visual source charge dominates total gate charge and is the main factor for switching time. Simulations and experiments show that the model has very good accuracy.
  • Keywords
    power semiconductor switches; inductive-switching loss model; source inductance; switching loop inductance; switching power loss; voltage stress; Equations; Inductance; Logic gates; Mathematical model; Switches; Switching loss; Visualization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Applied Power Electronics Conference and Exposition (APEC), 2014 Twenty-Ninth Annual IEEE
  • Conference_Location
    Fort Worth, TX
  • Type

    conf

  • DOI
    10.1109/APEC.2014.6803355
  • Filename
    6803355