DocumentCode
1324096
Title
3-D Parallel Fault Simulation With GPGPU
Author
Min Li ; Hsiao, Michael S.
Author_Institution
Bradley Dept. of Electr. & Comput. Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA
Volume
30
Issue
10
fYear
2011
Firstpage
1545
Lastpage
1555
Abstract
General purpose computing on graphical processing units (GPGPU) is a paradigm shift in computing that promises a dramatic increase in performance. GPGPU also brings an unprecedented level of complexity in algorithmic design and software development. In this paper, we present an efficient parallel fault simulator, FSimGP2, that exploits the high degree of parallelism supported by a state-of-the-art graphic processing unit (GPU) with the NVIDIA compute unified device architecture. A novel 3-D parallel fault simulation technique is proposed to achieve extremely high computation efficiency on the GPU. Global communication is minimized by concentrating as much work as possible on the local device´s memory. We present results on a GPU platform from NVIDIA (a GeForce GTX 285 graphics card) that demonstrate a speedup of up to 63× and 4× compared to two other GPU-based fault simulators and up to 95× over a state-of-the-art algorithm on conventional processor architectures.
Keywords
circuit simulation; computer graphic equipment; coprocessors; integrated circuit reliability; parallel architectures; 3D parallel fault simulation technique; FSimGP2 parallel fault simulator; GPGPU; GeForce GTX 285 graphics card; NVIDIA compute unified device architecture; general purpose computing; global communication; graphical processing units; local device memory; processor architectures; Circuit faults; Computational modeling; Graphics processing unit; Instruction sets; Integrated circuit modeling; Logic gates; Parallel processing; Compute unified device architecture (CUDA); fault simulation; general purpose computation on graphics processing unit (GPGPU); parallel algorithm; single-instruction multiple threads (SIMT);
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2011.2158432
Filename
6022009
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