Mixed-signal transmitter chip with digital bridge and analogue front-end for XDSL in home networks

This study presents a mixed-signal transmitter chip that is fabricated using mixed-signal 0.18-μm complementary metal oxide semiconductor technology in home network. The purpose is not only to design a digital bridge that is located between the Ethernet and the asynchronous transfer mode, but also to control the packet flow without using a microprocessor. The proposed chip comprises a transmitting path circuitry of analogue front-end (AFE), which consists of a line driver (LD), a low-pass filter, a digital-to-analogue converter (DAC) and a digital bridge, which includes five blocks μ frequency-division block, sub-receiver block, sub-counter block, utopia block and first-in-first-out (FIFO) block. In AFE, a segmented 10 bits DAC is used to eliminate glitches and to reduce differential non-linearity errors; a low-voltage LD is designed using a feed-forward capacitor and a quiescent current control circuit to reduce the zero crossover distortion and harmonics. With respect to the digital bridge, a synchronised source code is provided to produce three synchronised clock signals, and a FIFO block is applied as a traffic management to control the traffic quality. Notably, the digital bridge is designed using the bottom-up approach with a small latency.