A high-speed 2-D topography simulator based on a pixel model

Author

Tazawa, Satoshi ; Ochiai, Katsuyuki ; Matsuo, Seitaro ; Nakajima, Shigeru

Author_Institution

NTT LSI Labs., Kanagawa, Japan

Volume

16

Issue

4

fYear

1997

fDate

4/1/1997 12:00:00 AM

Firstpage

386

Lastpage

397

Abstract

A high-speed two-dimensional (2-D) topography simulator which operates in X-Windows has been developed. This program, named TIGER (Topography Image GEneration Routine), uses a newly developed pixel model, in which regions of the same material are depicted by pixels with the same value (i.e. the same color) and material boundaries are regarded as color boundaries. New cross-sectional profiles are sequentially created by drawing basic geometrical figures on a cross-sectional profile of a former process step. No complex operations are required for boundary line definition, such as loop removal. Realistic cross sections of an LSI with three interconnection layers and an SST transistor with a complex structure were created by this simulator. The total simulation time is only one or two minutes for all the processing steps of an LSI

Keywords

circuit CAD; circuit analysis computing; digital simulation; integrated circuit interconnections; large scale integration; semiconductor process modelling; 2D topography simulator; LSI; SST transistor; TIGER; X-Windows; boundary line definition; cross-sectional profiles; geometrical figures; interconnection layers; material boundaries; pixel model; simulation time; topography image generation routine; Algebra; Biological materials; Deformable models; Failure analysis; Filters; Image generation; Large scale integration; Pixel; Surfaces; Two dimensional displays;

fLanguage

English

Journal_Title

Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on

Publisher

ieee

ISSN

0278-0070

Type

jour

DOI

10.1109/43.602475

Filename

602475