• DocumentCode
    1326390
  • Title

    An Area-Efficient CMOS Bandgap Reference Utilizing a Switched-Current Technique

  • Author

    Indika U.K, Bogoda A ; Okura, Shunsuke ; Ido, Toru ; Taniguchi, Kenji

  • Author_Institution
    Div. of Electr., Electron. & Inf. Eng., Osaka Univ., Suita, Japan
  • Volume
    57
  • Issue
    10
  • fYear
    2010
  • Firstpage
    762
  • Lastpage
    766
  • Abstract
    An area-efficient CMOS bandgap reference (BGR) with switched-current and current-memory techniques is presented. The proposed circuit uses only one parasitic bipolar transistor to generate a reference voltage so that significant area reduction can be achieved. In addition, bipolar transistor device mismatch can be eliminated. The circuit produces an output of about 650 mV, and simulated results show that the temperature coefficient of the output is less than 10.4 ppm/°C in the temperature range from 0°C to 100°C. The average current consumption is about 49.5 μA in the above temperature range. Furthermore, the output can be set to almost any value. The circuit was designed and simulated in 0.25- μm CMOS technology. The layout occupies less than 0.0011 mm2 (100 μm × 110 μm).
  • Keywords
    CMOS integrated circuits; bipolar transistors; low-power electronics; switched current circuits; CMOS technology; area-efficient CMOS bandgap reference; current-memory technique; parasitic bipolar transistor; size 0.25 mum; switched-current technique; Bipolar transistors; CMOS integrated circuits; CMOS technology; Logic gates; Photonic band gap; Resistors; Switching circuits; Area efficient; CMOS; bandgap reference (BGR); temperature coefficient (TC);
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems II: Express Briefs, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-7747
  • Type

    jour

  • DOI
    10.1109/TCSII.2010.2058593
  • Filename
    5575403