Improving manufacturing reliability in IC package assembly using FMEA technique

Author

Prasad, Shankara

Author_Institution

APT Int., Princeton Junction, NJ, USA

Volume

14

Issue

3

fYear

1991

fDate

9/1/1991 12:00:00 AM

Firstpage

452

Lastpage

456

Abstract

The author presents the basic potential failure mode and effect analysis (FMEA) technique as applied to IC assembly and shows how the technique is useful for complex package assembly and multichip module assembly. The FMEA technique can be described as a systemized group of activities intended to: (a) recognize and evaluate the potential failure modes and causes associated with the designing and manufacturing of an IC package; (b) identify actions which could eliminate or reduce the chance of the potential failure occurring; and (c) document the process. The use of FMEA for improving the manufacturability and manufacturing reliability of packages by a systematic and quantified analysis of the package design and process is also discussed

Keywords

VLSI; design engineering; failure analysis; hybrid integrated circuits; integrated circuit manufacture; microassembling; packaging; reliability; IC assembly; IC package assembly; complex package assembly; failure mode and effect analysis; manufacturability; manufacturing reliability; multichip module assembly; package design; package process; potential failure modes; quantified analysis; systematic analysis; Aerospace industry; Assembly; Automobile manufacture; Costs; Failure analysis; Integrated circuit packaging; Manufacturing industries; Manufacturing processes; Multichip modules; Packaging machines;

fLanguage

English

Journal_Title

Components, Hybrids, and Manufacturing Technology, IEEE Transactions on

Publisher

ieee

ISSN

0148-6411

Type

jour

DOI

10.1109/33.83926

Filename

83926