The performance analysis of the Homogeneous Multiprocessor Proper

Presents the structure and implementation details of a simulator which was written for the homogeneous multiprocessor proper. The homogeneous multiprocessor is a tightly coupled MIMD architecture composed of a number of processing elements and a distributively controlled network of switches, which permits each processor to access the resources of its two immediate neighbours. In addition, a fast local area network permits each processor to communicate with all other processors in a point-to-point or broadcast mode. The results of two simulation experiments which were carried out using the simulator are also presented. The first experiment was designed to test the behaviour of the network of switches under a varying interprocessor communication demand, while the second experiment was designed to obtain a performance measure of the multiprocessor by simulating a distributed algorithm for the calculation of the autocorrelation functions of a given signal.