Electroplated solder joints for flip-chip applications

A step-by-step description of a solder electroplating process for flip-chip applications is provided. The necessity of phasing Cr and Cu in the under-bump metallurgy (UBM), which also functions as the current path during plating, is verified by a scanning-electron-microscope (SEM) study of the intermetallics in the reflowed solder joints. Characteristics of the SnPb solder plating bath are presented, and key issues on designing and operating manufacture scale cells are identified. Mathematical modeling of the plating process confirms the capability of the plating process to produce solder bumps of uniform volume and solder composition. Feasibility of the electroplated solder bumping process is demonstrated on dice with an area array of pads of a ~0.005-in diameter on a 0.010-in pitch. Data on preliminary mechanical testing conducting to evaluate the integrity of the solder joints are presented