• DocumentCode
    1327503
  • Title

    Integrated circuits for data transmission over twisted-pair channels

  • Author

    Johns, David A. ; Essig, Daniel

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
  • Volume
    32
  • Issue
    3
  • fYear
    1997
  • fDate
    3/1/1997 12:00:00 AM
  • Firstpage
    398
  • Lastpage
    406
  • Abstract
    This paper discusses typical architectures and challenges in designing integrated circuits for data transmission over twisted-pair wire channels. To highlight the various architectural approaches, two main applications are discussed-high-bit-rate digital subscriber loop (HDSL) and fast-Ethernet. Although these two applications have orders of magnitude difference in their bit rates, they share many common building blocks including line-drivers, 24 wire hybrids, echo cancellation, digital equalization, and clock recovery. Typical integrated circuit approaches for realizing each of these blocks are presented as well as possible tradeoffs. Finally, future challenges facing integrated circuit designers are presented
  • Keywords
    crosstalk; data communication; data communication equipment; digital communication; driver circuits; echo suppression; equalisers; local area networks; monolithic integrated circuits; subscriber loops; timing; twisted pair cables; clock recovery; data transmission; digital equalization; digital subscriber loop; echo cancellation; fast-Ethernet; high-bit-rate DSL; integrated circuits; line-drivers; twisted-pair channels; wire hybrids; Cables; Clocks; DSL; Data communication; Echo cancellers; Frequency; Impedance; Intersymbol interference; Transmission lines; Wire;
  • fLanguage
    English
  • Journal_Title
    Solid-State Circuits, IEEE Journal of
  • Publisher
    ieee
  • ISSN
    0018-9200
  • Type

    jour

  • DOI
    10.1109/4.557638
  • Filename
    557638