Title :
High-speed/high-bandwidth design methodologies for on-chip DRAM core multimedia system LSI´s
Author :
Tsuruda, Takahiro ; Kobayashi, Mako ; Tsukude, Masaki ; Yamagata, Tadato ; Arimoto, Kazutami ; Yamada, Michihiro
Author_Institution :
ULSI Lab., Mitsubishi Electr. Corp., Hyogo, Japan
fDate :
3/1/1997 12:00:00 AM
Abstract :
Recently, as multimedia large scale integrated devices (LSIs) have developed, there has been strongly increased demand for high-speed/high-bandwidth LSIs which integrate the DRAM core and logic elements (CPU etc.). However, the high-speed/high-bandwidth operation induces the large switching noise. This noise degrades the DRAM´s operating margin, and especially its data retention characteristics. In this paper, we analyze the noise transmission model and propose DRAM and logic compatible design methodologies to maintain the reliability of high-speed/high-bandwidth system LSIs. We also show that good experimental results are obtained on the test device. Furthermore, we propose the most suitable VDD/GND line scheme for on-chip DRAM system LSI
Keywords :
CMOS memory circuits; DRAM chips; integrated circuit design; integrated circuit modelling; integrated circuit noise; large scale integration; multimedia systems; data retention characteristics; high-bandwidth design methodologies; high-speed design methodologies; logic elements; multimedia system LSI; noise transmission model; on-chip DRAM core; reliability; switching noise; Acoustical engineering; Circuit noise; Degradation; Design methodology; Large scale integration; Leakage current; Multimedia systems; Random access memory; Subthreshold current; System-on-a-chip;
Journal_Title :
Solid-State Circuits, IEEE Journal of
