• DocumentCode
    1327661
  • Title

    Low-cost process for fabricating polysilicon transistors

  • Author

    Ipri, Alfred C. ; Kaganowicz, Grzegorz

  • Author_Institution
    SRI Int., Princeton, NJ, USA
  • Volume
    37
  • Issue
    7
  • fYear
    1990
  • fDate
    7/1/1990 12:00:00 AM
  • Firstpage
    1771
  • Lastpage
    1772
  • Abstract
    A process for the fabrication of p-channel polysilicon MOS transistors is described. The process is compatible with the use of low-temperature glass substrates and replaces the use of ion implantation for the source/drain doping with in situ doped polysilicon. MOS transistors made with this process exhibit an on/off current ratio of 2.5×105, a mobility of 16 cm2/V-s, and a subthreshold slope of 1.3 V/decade
  • Keywords
    elemental semiconductors; insulated gate field effect transistors; semiconductor doping; silicon; MOS transistors; low-temperature glass substrates; mobility; on/off current ratio; polysilicon transistors; source/drain doping; subthreshold slope; Aluminum; Amorphous silicon; Costs; Doping; Electrons; Fabrication; Glass; Ion implantation; MOSFETs; Semiconductor films;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.55767
  • Filename
    55767
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1327661