DocumentCode :
1327866
Title :
Contact-Resistance Reduction for Strained n-FinFETs With Silicon–Carbon Source/Drain and Platinum-Based Silicide Contacts Featuring Tellurium Implantation and Segregation
Author :
Koh, Shao-Ming ; Kong, Eugene Yu-Jin ; Liu, Bin ; Ng, Chee-Mang ; Samudra, Ganesh S. ; Yeo, Yee-Chia
Author_Institution :
Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore, Singapore
Volume :
58
Issue :
11
fYear :
2011
Firstpage :
3852
Lastpage :
3862
Abstract :
Tellurium (Te) implantation was introduced to tune the effective electron Schottky barrier height (SBH) ΦBn of platinum-based silicide (PtSi) contacts formed on n-type silicon-carbon (Si:C). Te introduced by ion implantation prior to Pt deposition segregated at the PtSi:C/Si:C interface during PtSi:C formation. The presence of Te at the PtSi:C/Si:C interface leads to a low ΦBn of 120 meV for PtSi:C contacts. The integration of Te-segregated PtSi:C contacts on strained n-channel fin field-effect transistors (FinFETs) with Si:C source/drain (S/D) stressors achieves the lowering of the parasitic series resistance RSD by ~62% and increases the saturation drive current by ~22%. The Te-segregated contact-resistance reduction technology does not degrade the short-channel effects and positive-bias temperature instability characteristics of n-FinFETs with Si:C S/D. As PtSi has a low SBH for holes and is a suitable contact for p-FinFETs, this new contact-resistance reduction technology has potential to be introduced as a single-metal-silicide dual-barrier-height solution for future complementary metal-oxide-semiconductor FinFET technology.
Keywords :
CMOS integrated circuits; MOSFET; Schottky barriers; contact resistance; electrical contacts; platinum compounds; silicon; tellurium; PtSi:C; Si:C; Te; complementary metal-oxide-semiconductor; contact-resistance reduction technology; electron Schottky barrier height; ion implantation; n-type silicon-carbon; p-FinFET; parasitic series resistance; platinum-based silicide contacts; positive-bias temperature instability characteristics; silicon-carbon drain; silicon-carbon source; single-metal-silicide dual-barrier-height solution; strained n-FinFET; strained n-channel fin field-effect transistors; tellurium implantation; tellurium segregation; Logic gates; Resistance; Schottky barriers; Silicidation; Silicides; Silicon; Substrates; Contact resistance; Schottky barrier; Tellurium (Te); fin field-effect transistor (FinFET); platinum silicide (PtSi); silicon–carbon (Si:C);
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2011.2166077
Filename :
6026233
Link To Document :
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