DocumentCode
1328639
Title
Complementary neu-GaAs structure
Author
Celinski, P. ; López, J.F. ; Al-Sarawi, S. ; Abbott, D.
Author_Institution
Dept. of Electr. & Electron. Eng., Adelaide Univ., SA, Australia
Volume
36
Issue
5
fYear
2000
fDate
3/2/2000 12:00:00 AM
Firstpage
424
Lastpage
425
Abstract
A neu-MOS like transistor structure using complementary GaAs HIGFET transistors, neu-GaAs, which uses capacitively coupled inputs onto a floating gate is presented. The design and simulation results of a neu-GaAs ripple carry adder are presented, demonstrating the potential for a very significant reduction in transistor count and area for equal power dissipation, through the use of neu-GaAs in VLSI design. A neu-GaAs design is presented which does not require floating gate initialisation due to the presence of a small gate leakage current in the HIGFET structure
Keywords
III-V semiconductors; MOS integrated circuits; VLSI; adders; gallium arsenide; integrated circuit design; leakage currents; neural chips; GaAs; HIGFET structure; VLSI design; capacitively coupled inputs; complementary HIGFET transistors; equal power dissipation; floating gate; gate leakage current; neu-MOS like transistor structure; ripple carry adder; transistor count;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20000384
Filename
840077
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