• DocumentCode
    1329025
  • Title

    Metastability reduction by aperture transformation

  • Author

    Varma, P. ; Panwar, B.S. ; Singh, A. ; Sriram, S.

  • Author_Institution
    Indian Inst. of Technol., New Delhi, India
  • Volume
    36
  • Issue
    6
  • fYear
    2000
  • fDate
    3/16/2000 12:00:00 AM
  • Firstpage
    501
  • Lastpage
    503
  • Abstract
    A methodology is proposed, which involves the use of an aperture transformer comprising a new controlled clock circuit. For reducing overall metastability by first transforming unsafe edge arrival times into metastability of the control signals. A large reduction in metastability has been demonstrated by the development of a new bit synchroniser built using the methodology
  • Keywords
    circuit stability; digital circuits; synchronisation; timing circuits; aperture transformation; bit synchroniser; controlled clock circuit; edge arrival times; metastability reduction;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:20000407
  • Filename
    840128
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1329025