Analytical Solution for Steady-State and Transient Temperature Fields in Vertically Stacked 3-D Integrated Circuits

Vertical integration for microelectronics poses significant challenges related to dissipation of heat generated in multiple device planes. Thermal management of 3-D integrated circuits (3-D ICs) is recognized to be one of the foremost technological and research challenges currently blocking the widespread adoption of this promising technology. The computation of steady-state and transient temperature fields in a 3-D IC is critical for determining the thermal characteristics of a 3-D IC and for evaluating any candidate thermal management technology. This paper presents an analytical solution for the 3-D temperature field in a 3-D IC based on the solution of the governing energy equations using Fourier series expansion for steady-state temperature fields. In addition, this approach is combined with Laplace transforms to determine transient temperature fields. Comparison of the temperature fields predicted by the proposed models with finite-element simulations shows excellent agreement. The model is used to compute the temperature field in a representative 3-D IC, and it is shown that by utilizing a thermal-friendly floorplanning approach, the maximum temperature of the 3-D IC is reduced substantially.