DocumentCode :
1329349
Title :
Design of a very linear CMOS transconductance input stage for continuous-time filters
Author :
Van Peteghem, Peter M. ; Fossati, Humberto M. ; Rice, Glenn L. ; Lee, Sang-Yong
Author_Institution :
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
Volume :
25
Issue :
2
fYear :
1990
fDate :
4/1/1990 12:00:00 AM
Firstpage :
497
Lastpage :
501
Abstract :
A CMOS differential input stage for transconductance amplifiers that combines a low noise excess factor, low input capacitance, and high common-mode rejection ratio with a very good linearity is described. The measured distortion is only 0.2% for a 1-V RMS input signal and only 1% for a 2-V RMS input signal on a test circuit implemented in a standard 3-μm CMOS process, using ±5-V supplies, resulting in over 85 dB of dynamic range. Applications include high-performance continuous-time filters and linear amplifiers
Keywords :
CMOS integrated circuits; active filters; differential amplifiers; integrated circuit technology; operational amplifiers; 1 to 2 V; 3 micron; 5 V; CMOS differential input stage; CMRR; OTA; continuous-time filters; distortion; dynamic range; good linearity; high common-mode rejection ratio; linear CMOS transconductance input stage; linear amplifiers; low input capacitance; low noise excess factor; transconductance amplifiers; Capacitance; Circuit noise; Circuit testing; Differential amplifiers; Distortion measurement; Linearity; Low-noise amplifiers; Signal processing; Signal to noise ratio; Transconductance;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.52176
Filename :
52176
Link To Document :
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