DocumentCode :
1329559
Title :
Three-state CMOS buffer with input hysteresis
Author :
Bundalo, Z.V.
Author_Institution :
Banja Luka Univ.
Volume :
24
Issue :
14
fYear :
1988
fDate :
7/7/1988 12:00:00 AM
Firstpage :
885
Lastpage :
886
Abstract :
A three-state CMOS buffer with the input hysteresis is proposed. The principle of its operation is described, and the operational conditions and static and dynamic parameters are briefly analysed. The circuit has a high output drive capability and increased noise immunity. The hysteresis can be controlled by a proper choice of the transistor geometries
Keywords :
CMOS integrated circuits; buffer circuits; integrated logic circuits; ternary logic; common buses; dynamic parameters; high output drive capability; input hysteresis; noise immunity; static transfer characteristic; ternary logic circuits; three-state CMOS buffer;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
Filename :
8402
Link To Document :
بازگشت