Title :
Very high-speed sigma-delta fractional-N synthesiser
Author :
Brennan, P.V. ; Walkington, R. ; Borkjak, A. ; Thompson, I.
Author_Institution :
Dept. of Electron. & Electr. Eng., Univ. Coll. London, UK
fDate :
2/17/2000 12:00:00 AM
Abstract :
A new method for implementing a sigma-delta fractional-N synthesiser is described. Results demonstrate that a substantial improvement in performance is possible and that the synthesiser is capable of meeting the digital cellular system (DCS) base station specification
Keywords :
sigma-delta modulation; DCS; PLL; base station specification; digital cellular system; sigma-delta fractional-N synthesiser;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20000059
