DocumentCode :
132998
Title :
Design and analysis of a buck-type class-D gate driver IC
Author :
Taewook Kang ; Jaeha Kim
Author_Institution :
Dept. of Electr. & Comput. Eng., Inter-Univ. Semicond. Res. Center, Seoul, South Korea
fYear :
2014
fDate :
16-20 March 2014
Firstpage :
2600
Lastpage :
2604
Abstract :
This paper describes a design approach to minimize the gate-switching loss of a buck-type class-D gate driver. This recently-proposed gate driver works as a mini bidirectional buck converter itself, which charges and discharges the gate node of a power device (e.g. IGBT) by feeding a chain of short pulses into an LC filter, of which widths gradually increase or decrease. The presented analysis discusses the optimal design parameter values such as the inductance, pulse-switching frequency, internal switch sizes, and transition time. The theoretical findings are confirmed by the measurement results, which demonstrated a 62% energy-recycling while switching a 120-nC IGBT at 40-kHz and 15-V.
Keywords :
driver circuits; insulated gate bipolar transistors; power convertors; LC filter; buck-type class-D gate driver integrated circuits; frequency 40 kHz; gate-switching loss; internal switch size; mini bidirectional buck converter itself; optimal design parameter; pulse switching frequency; transition time; voltage 15 V; Capacitance; Inductors; Integrated circuits; Logic gates; Recycling; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Applied Power Electronics Conference and Exposition (APEC), 2014 Twenty-Ninth Annual IEEE
Conference_Location :
Fort Worth, TX
Type :
conf
DOI :
10.1109/APEC.2014.6803670
Filename :
6803670
Link To Document :
بازگشت