Title :
A minimal universal test set for self-test of EXOR-Sum-of-Products circuits
Author :
Kalay, Ugur ; Hall, Douglas V. ; Perkowski, Marek A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Portland State Univ., OR, USA
fDate :
3/1/2000 12:00:00 AM
Abstract :
A testable EXOR-Sum-of-Products (ESOP) circuit realization and a simple, universal test set which detects all single stuck-at faults in the internal lines and the primary inputs/outputs of the realization are given. Since ESOP is the most general form of AND-EXOR representations, our realization and test set are more versatile than those described by other researchers for the restricted GRM, FPRM, and PPRM forms of AND-EXOR circuits. Our circuit realization requires only two extra inputs for controllability and one extra output for observability. The cardinality of our test set for an n input circuit is (n+6). For Built-in Self-Test (BIST) applications, we show that our test set can be generated internally as easily as a pseudorandom pattern and that it provides 100 percent single stuck-at fault coverage. In addition, our test set requires a much shorter test cycle than a comparable pseudoexhaustive or pseudorandom test set
Keywords :
built-in self test; combinational circuits; design for testability; logic testing; AND-EXOR realizations; Built-in Self-Test; Design for Testing; ESOP; EXOR-Sum-of-Products; Reed-Muller expressions; Universal test set; easily testable combinational networks; minimal universal test set; observability; self-testable circuits; single stuck-at faults; test pattern generation; test set; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Controllability; Electrical fault detection; Fault detection; Input variables; Observability; Test pattern generators;
Journal_Title :
Computers, IEEE Transactions on