Title :
A detailed analysis of CMOS SRAM´s with gate oxide short defects
Author :
Segura, Jaume ; Rubio, Antonio
Author_Institution :
Dept. of Phys., Balearic Islands Univ., Palma de Mallorca, Spain
fDate :
10/1/1997 12:00:00 AM
Abstract :
Using a model of gate oxide short defects, previously developed and validated experimentally, we investigate the behavior of CMOS SRAM memories having this defect. Faulty behaviors caused by gate oxide shorts are characterized classifying those that may cause a logic malfunction and those that degrade the memory operation without causing a logic error. Merits of SRAM test algorithms to detect gate oxide shorts are analyzed, identifying which are effective in terms of coverage and test cost
Keywords :
CMOS memory circuits; SRAM chips; fault diagnosis; CMOS SRAM memory; gate oxide short defect; logic error; test algorithm; CMOS logic circuits; Circuit faults; Circuit testing; Degradation; Logic circuits; Logic devices; Logic testing; MOSFETs; Random access memory; Read-write memory;
Journal_Title :
Solid-State Circuits, IEEE Journal of
