Title :
SARC Coherence: Scaling Directory Cache Coherence in Performance and Power
Author :
Kaxiras, Stefanos ; Keramidas, Georgios
Author_Institution :
Inf. Technol. Dept., Uppsala Univ., Uppsala, Sweden
Abstract :
The SARC project seeks to improve power scalability of shared-memory chip multiprocessors (CMPs) by making directory coherence more efficient in both power and performance. The authors describe how they eliminate two major sources of inefficiency for directory coherence protocols: invalidation traffic on writes and directory indirection for finding the writer.
Keywords :
microprocessor chips; shared memory systems; SARC coherence; directory cache coherence; directory coherence protocols; power scalability; shared-memory chip multiprocessors; Coherence; Multicore processing; Protocols; Registers; Scalability; Synchronization; System-on-a-chip; SARC architecture; chip multiprocessors; directory cache coherence; power and performance scalability;
Journal_Title :
Micro, IEEE
