DocumentCode
1331137
Title
An analytical model for breakdown voltage of surface implanted SOI RESURF LDMOS
Author
Chung, Sang-Koo
Author_Institution
Dept. of Electron. Eng., Ajou Univ., Suwon, South Korea
Volume
47
Issue
5
fYear
2000
fDate
5/1/2000 12:00:00 AM
Firstpage
1006
Lastpage
1009
Abstract
An analytical model for the breakdown voltage of the surface implanted silicon-on-insulator (SOI) REduced SURface Field (RESURP) LDMOS is presented, which allows useful design curves of breakdown voltage in terms of the device parameters, including the substrate bias voltage. Improvement on both the breakdown voltage and the on-resistance of the device due to the surface implantation is demonstrated. Numerical simulations are shown to support the analytical results
Keywords
ion implantation; power MOSFET; semiconductor device breakdown; semiconductor device models; silicon-on-insulator; SOI reduced surface field LDMOS; Si; analytical model; breakdown voltage; design curves; device parameters; on-resistance; substrate bias voltage; surface implantation; surface implanted SOI RESURF LDMOS; Analytical models; Breakdown voltage; Doping; Electric breakdown; Helium; Length measurement; Numerical simulation; Position measurement; Semiconductor process modeling; Silicon on insulator technology;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.841233
Filename
841233
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