DocumentCode
1331157
Title
A review of the pseudo-MOS transistor in SOI wafers: operation, parameter extraction, and applications
Author
Cristoloveanu, Sorin ; Munteanu, Daniela ; Liu, Michael S T
Author_Institution
Lab. de Phys. des Composants a Semicond., ENSERG, Grenoble, France
Volume
47
Issue
5
fYear
2000
fDate
5/1/2000 12:00:00 AM
Firstpage
1018
Lastpage
1027
Abstract
The pseudo-MOS transistor (Ψ-MOSFET) is a surprising and useful technique for the rapid evaluation of SOI wafers, prior to any CMOS processing. We review the static and dynamic modes of operation as well as the main models and methods for electrical parameter extraction. Selected numerical simulations are presented in order to clarify the optimal conditions of operation. Finally, practical applications are exemplified which illustrate the efficiency of the Ψ-MOSFET technique for in situ characterization of SOI technologies and processes
Keywords
MOSFET; parameter estimation; semiconductor device models; silicon-on-insulator; SOI technologies; SOI wafers; dynamic modes; efficiency; electrical parameter extraction; in situ characterization; pseudo-MOS transistor; static modes; Conductivity; Insulation; MOSFET circuits; Numerical simulation; Parameter extraction; Probes; Semiconductor films; Silicon on insulator technology; Slabs; Substrates;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.841236
Filename
841236
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