• DocumentCode
    1331244
  • Title

    Data-driven self-timed RSFQ high-speed test system

  • Author

    Deng, Z.J. ; Yoshikawa, N. ; Whiteley, S.R. ; Van Duzer, T.

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
  • Volume
    7
  • Issue
    4
  • fYear
    1997
  • Firstpage
    3830
  • Lastpage
    3833
  • Abstract
    Functional testing of rapid single-flux-quantum (RSFQ) logic circuits at high speed is necessary to further optimize circuit design, but it is not easy to do off-chip testing because of the high speed and small amplitude of SFQ pulses. This paper will present the design and test results of an 20 Gb/s bit-by-bit on-chip high-speed digital test system based on data-driven self-timed (DDST) circuits.
  • Keywords
    logic testing; superconducting device testing; superconducting logic circuits; 20 Gbit/s; RSFQ logic circuit; data-driven self-timed circuit; on-chip high-speed digital testing; Automatic testing; Circuit testing; Clocks; Life testing; Logic testing; Pulse circuits; Shift registers; System testing; System-on-a-chip; Timing;
  • fLanguage
    English
  • Journal_Title
    Applied Superconductivity, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1051-8223
  • Type

    jour

  • DOI
    10.1109/77.659434
  • Filename
    659434
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1331244