Title :
A novel flash EEPROM cell based on trench technology for integration within power integrated circuits
Author :
Garner, D.M. ; Chen, Y. ; Sabesan, L. ; Amaratunga, G.A.J. ; Blackburn, A. ; Clark, J. ; Sekiariapuram, S.S. ; Evans, A.G.R.
Author_Institution :
Dept. of Eng., Cambridge Univ., UK
fDate :
5/1/2000 12:00:00 AM
Abstract :
A flash EEPROM suitable for integration within power integrated circuits (PIC´s) is presented. The EEPROM cell uses a trench floating gate to give a large gate charge while using no more silicon area than a conventional flash EEPROM cell. The cell shows good immunity against the induced disturbance voltages which are present in a PIC, and the storage lifetime is greater than ten years at a reading voltage of V/sub D/=2.2 V.
Keywords :
CMOS memory circuits; flash memories; integrated circuit measurement; integrated circuit technology; power integrated circuits; 10 year; 2.2 V; CMOS circuitry; flash EEPROM cell; induced disturbance voltage immunity; integration; large gate charge; power integrated circuits; reading voltage; storage lifetime; threshold voltage; trench floating gate; trench technology; Dielectric substrates; EPROM; Etching; Integrated circuit technology; Nonvolatile memory; Power integrated circuits; Silicon; Switches; Switching circuits; Voltage control;
Journal_Title :
Electron Device Letters, IEEE
