Title :
Efficient Polynomial Basis Multipliers for Type-II Irreducible Pentanomials
Author_Institution :
Dept. of Comput. Archit. & Syst. Eng., Complutense Univ. of Madrid, Madrid, Spain
Abstract :
Bit-parallel polynomial basis multipliers over the finite field GF(2m) generated using type-II irreducible pentanomials are considered in this brief. The bit-parallel multipliers presented here have the lowest delay known to date for similar multipliers based on this type of irreducible pentanomials, with a very small increase of XOR gates.
Keywords :
Galois fields; logic gates; multiplying circuits; polynomials; GF(2m) finite field; XOR gates; bit-parallel polynomial basis multipliers; polynomial basis multipliers; type-II irreducible pentanomials; Complexity theory; Delay; Logic gates; Matrix decomposition; Polynomials; Silicon; Vectors; $GF(2^{m})$; Bit-parallel multipliers; finite field; irreducible pentanomials; polynomial basis (PB);
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2012.2222836
