Title :
Measurement of Intersymbol Interference Jitter by Fractional Oversampling for Adaptive Equalization
Author :
Jang-Woo Lee ; Chang Hyun Bae ; Younghoon Kim ; Changsik Yoo
Author_Institution :
Integrated Circuits Lab., Hanyang Univ., Seoul, South Korea
Abstract :
The deterministic jitter due to the intersymbol interference (ISI) is measured on-chip by fractional oversampling, which can be used to adapt the equalization coefficients of a continuous-time linear equalizer. The effective resolution of the jitter measurement is improved to 0.1 unit interval (UI) by sampling the data input by multiphase sampling clocks spaced by 0.7 UI with the proposed fractional oversampling. The ISI jitter measurement technique with the fractional oversampling has been applied to a 4.2-Gb/s mesochronous serial link and implemented in a 0.13-μm CMOS process to prove the concept.
Keywords :
CMOS analogue integrated circuits; adaptive equalisers; intersymbol interference; jitter; CMOS process; ISI; adaptive equalization; bit rate 4.2 Gbit/s; continuous-time linear equalizer; fractional oversampling; intersymbol interference jitter measurement; mesochronous serial link; multiphase sampling clocks; size 0.13 mum; unit interval; Adaptive equalizers; Clocks; Jitter; Phase locked loops; Semiconductor device measurement; Temperature measurement; CMOS; equalization; intersymbol interference (ISI); jitter; mesochronous serial link; phase-locked loop (PLL);
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2012.2218472
