Fully self-aligned double mesa SiGe-HBT with external transistor optimisation

A significant reduction in parasitic resistances and capacitances of the double mesa SiGe-HBT was achieved using several self-aligning processes, such as planarisation for transistor contacts, outside-spacer-technology for micromasking, contact implantations and low ohmic silicides. The authors present and analyse the lateral optimisation by on-wafer measurements and simulations. It is shown that the fully self-aligned transistor combines the advantages of superior high frequency characteristics with a simple and low cost realisation procedure