nth-order multi-bit ΣΔ ADC using SAR quantiser

An nth-order multi-bit delta-sigma (ΣΔ) analogue-to-digital converter (ADC) using a successive approximation register (SAR) quantiser is proposed. By exploiting the residue voltage of a multi-bit SAR ADC, the proposed ADC performs as an nth-order noise shaping converter with only one opamp and removes the need for a feedback multi-bit DAC. In addition, the proposed architecture is very reconfigurable and can be implemented as a bandpass ADC.