• DocumentCode
    1333369
  • Title

    Metastability and Synchronizers: A Tutorial

  • Author

    Ginosar, Ran

  • Author_Institution
    Technion - Israel Inst. of Technol., Haifa, Israel
  • Volume
    28
  • Issue
    5
  • fYear
    2011
  • Firstpage
    23
  • Lastpage
    35
  • Abstract
    Metastability can arise whenever a signal is sampled close to a transition, leading to indecision as to its correct value. Synchronizer circuits, which guard against metastability, are becoming ubiquitous with the proliferation of timing domains on a chip. Despite the critical importance of reliable synchronization, this topic remains inadequately understood. This tutorial provides a glimpse into the theory and practice of this fascinating subject.
  • Keywords
    flip-flops; logic design; synchronisation; metastability; reliable synchronization; synchronizer circuits; timing domains; Flip-flops; Inverters; Synchronization; Threshold voltage; Tutorials; FIFO synchronizer; asynchronous; design and test; mesochronous; metastability; multisynchronous; synchronizer;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2011.113
  • Filename
    6028533