Title :
Proteus: An ASIC Flow for GHz Asynchronous Designs
Author :
Beerel, Peter A. ; Dimou, G.D. ; Lines, Andrew M.
Author_Institution :
Univ. of Southern California, Los Angeles, CA, USA
Abstract :
Editors´ note:The high-performance benefits of asynchronous design have hitherto been obtained only using full-custom design. This article presents an industrial-strength asynchronous ASIC CAD flow that enables the automatic synthesis and physical design of high-level specifications into GHz silicon, greatly reducing design time and enabling far wider use of asynchronous technology.
Keywords :
application specific integrated circuits; asynchronous circuits; integrated circuit design; logic CAD; logic design; GHz asynchronous designs; asynchronous technology; automatic synthesis; industrial strength asynchronous ASIC CAD flow; physical design; proteus; Asynchronous; Asynchronous transfer mode; Flip-flops; Hardware design languages; Logic gates; Synchronization; asynchronous design; asynchronous place and route; communicating sequential processes; design and test; high performance; slack matching;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2011.114
