• DocumentCode
    1334408
  • Title

    Fully parallel stochastic computation architecture

  • Author

    Janer, C.L. ; Quero, J.M. ; Ortega, J.G. ; Franquelo, L.G.

  • Author_Institution
    Escuela Superior de Ingenieros, Seville Univ., Spain
  • Volume
    44
  • Issue
    8
  • fYear
    1996
  • fDate
    8/1/1996 12:00:00 AM
  • Firstpage
    2110
  • Lastpage
    2117
  • Abstract
    A space-efficient fully parallel stochastic computation architecture is described. It circumvents the main drawback of stochastic computation architectures that have been used up to now: the absence of a space-efficient technique of adding weighted input signals in parallel
  • Keywords
    parallel architectures; probabilistic logic; signal processing; parallel stochastic computation architecture; parallel weighted input signals; space-efficient technique; Analog computers; Clocks; Computer architecture; Concurrent computing; Counting circuits; Logic; Signal design; Stochastic processes; Stochastic resonance; Stochastic systems;
  • fLanguage
    English
  • Journal_Title
    Signal Processing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1053-587X
  • Type

    jour

  • DOI
    10.1109/78.533736
  • Filename
    533736
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1334408