• DocumentCode
    1335234
  • Title

    An FPGA-based implementation and simulation of the AAL type 2 receiver

  • Author

    Tommiska, Matti ; Loukola, Mika ; Koskivirta, Tero

  • Author_Institution
    Laboratory of Signal Processing and Computer Technology, Helsinki University of Technology (HUT), Finland
  • Volume
    1
  • Issue
    1
  • fYear
    1999
  • fDate
    3/1/1999 12:00:00 AM
  • Firstpage
    63
  • Lastpage
    67
  • Abstract
    This paper describes a hardware implementation of an ATM Adaptation Layer (AAL) type 2 receiver. The simulation performance of the developed prototype is measured with real AAL type 2 encoded material and compared to two software-based AAL type 2 receiver implementations. The advantages and disadvantages of hardware-based and software-based simulation approaches in product development and prototyping are discussed. It is concluded that simulating a communication block directly in hardware both speeds up the simulations and decreases the development time.
  • Keywords
    Clocks; Field programmable gate arrays; Hardware; Integrated circuit modeling; Payloads; Receivers; Software; AAL Type 2; Decoder; FPGA;
  • fLanguage
    English
  • Journal_Title
    Communications and Networks, Journal of
  • Publisher
    ieee
  • ISSN
    1229-2370
  • Type

    jour

  • DOI
    10.1109/JCN.1999.6596699
  • Filename
    6596699
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1335234