Title :
High-speed, accurate analogue CMOS rank filter
Author :
Fikos, G. ; Vlassis, S. ; Siskos, S.
Author_Institution :
Dept. of Phys., Thessaloniki Univ., Greece
fDate :
3/30/2000 12:00:00 AM
Abstract :
A modular, low-voltage, analogue CMOS architecture for rank extraction based on the use of a simple, compact current amplifying cell is proposed. The circuit has a DC error of <-50 dB for inputs ranging from 100 nA to 30 μA, recovery time of <12 ns, and electronic tunability of the extracted rank
Keywords :
CMOS analogue integrated circuits; active filters; current-mode circuits; high-speed integrated circuits; low-power electronics; 100 nA to 30 muA; DC error; current amplifying cell; electronic tunability; high-speed analogue CMOS rank filter; modular low-voltage architecture; rank extraction; recovery time;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20000428
