Low-noise and high-gain mixer combining switched-biasing and current-bleeding techniques

Author

Kim, Marn-Go ; Lee, Jeyull ; Yun, Taehwa

Author_Institution

Dept. of Electr. & Comput. Eng., Hanyang Univ., Seoul, South Korea

Volume

48

Issue

23

fYear

2012

Firstpage

1476

Lastpage

1478

Abstract

A low-noise and high-gain down-conversion mixer fabricated via a 0.13 μm CMOS process is presented. The proposed mixer is based on the folded-type topology and includes an inverter transconductance, a switched biasing circuit and an LO switch, which improve the conversion gain and noise figure. Moreover, the switched biasing circuit is combined with a current bleeding circuit to reduce power consumption and flicker noise. A conversion gain of 24.75 dB and a noise figure of 4.59 dB were achieved at 2.1 GHz of RF while consuming 1.93 mW from a supply voltage of 1.0 V.

Keywords

CMOS integrated circuits; UHF integrated circuits; UHF mixers; flicker noise; CMOS process; LO switch; current bleeding circuit; current-bleeding techniques; flicker noise; folded-type topology; frequency 2.1 GHz; gain 24.75 dB; high-gain down-conversion mixer; inverter transconductance; low-noise down-conversion mixer; noise figure 4.59 dB; power 1.93 mW; power consumption; size 0.13 mum; switched biasing circuit; switched-biasing techniques; voltage 1.0 V;

fLanguage

English

Journal_Title

Electronics Letters

Publisher

iet

ISSN

0013-5194

Type

jour

DOI

10.1049/el.2012.2642

Filename

6354238