Electrical characterization of megabit DRAMs. 1. External testing

Author

Antonin, G. ; Oberle, H.-D. ; Kölzer, J.

Author_Institution

Siemens AG, Munich, Germany

Volume

8

Issue

3

fYear

1991

Firstpage

36

Lastpage

43

Abstract

An approach to the electrical characterization of dynamic RAMs in which chip design and DRAM process technology are verified and optimized concurrently is reported. Both parametric and functional tests were performed. The authors describe an information and scheduling system for analysis and testing that handles the required electrical measuring data from the testers. It is shown how data analysis supports the interpretations by data correlations on a real statistical basis. The short learning cycle required by this approach was obtained by ensuring the smooth cooperation of all those involved in the overall analysis.<>

Keywords

DRAM chips; circuit analysis computing; data analysis; integrated circuit testing; scheduling; DRAM process technology; chip design; data analysis; data correlations; dynamic RAMs; electrical characterization; electrical measuring data; external testing; functional tests; information system; learning cycle; optimization; parametric tests; scheduling system; verification; CMOS technology; Circuit simulation; Circuit testing; Collaboration; Costs; Design automation; Process design; Random access memory; Read-write memory; Silicon;

fLanguage

English

Journal_Title

Design & Test of Computers, IEEE

Publisher

ieee

ISSN

0740-7475

Type

jour

DOI

10.1109/54.84242

Filename

84242