• DocumentCode
    1336935
  • Title

    A programming methodology for dual-tier multicomputers

  • Author

    Baden, Scott B. ; Fink, Stephen J.

  • Author_Institution
    Dept. of Comput. Sci. & Eng., California Univ., San Diego, La Jolla, CA, USA
  • Volume
    26
  • Issue
    3
  • fYear
    2000
  • fDate
    3/1/2000 12:00:00 AM
  • Firstpage
    212
  • Lastpage
    226
  • Abstract
    Hierarchically organized ensembles of shared memory multiprocessors possess a richer and more complex model of locality than previous generation multicomputers with single processor nodes. These dual-tier computers introduce many new factors into the programmer´s performance model. We present a methodology for implementing block-structured numerical applications on dual-tier computers and a run-time infrastructure, called KeLP2, that implements the methodology. KeLP2 supports two levels of locality and parallelism via hierarchical SPMD control flow, run-time geometric meta-data, and asynchronous collective communication. KeLP applications can effectively overlap communication with computation under conditions where nonblocking point-to-point message passing fails to do so. KeLP´s abstractions hide considerable detail without sacrificing performance and dual-tier applications written in KeLP consistently outperform equivalent single-tier implementations written in MPI. We describe the KeLP2 model and show how it facilitates the implementation of five block-structured applications specially formulated to hide communication latency on dual-tiered architectures. We support our arguments with empirical data from applications running on various single- and dual-tier multicomputers. KeLP2 supports a migration path from single-tier to dual-tier platforms and we illustrate this capability with a detailed programming example
  • Keywords
    message passing; parallel processing; parallel programming; shared memory systems; KeLP2; asynchronous collective communication; block-structured numerical applications; communication latency; dual-tier multicomputers; dual-tiered architectures; hierarchical SPMD control flow; performance model; point-to-point message passing; programming methodology; run-time geometric meta-data; run-time infrastructure; shared memory multiprocessors; Application software; Communication system control; Computer applications; Computer architecture; Concurrent computing; Delay; Message passing; Parallel processing; Programming profession; Runtime;
  • fLanguage
    English
  • Journal_Title
    Software Engineering, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-5589
  • Type

    jour

  • DOI
    10.1109/32.842948
  • Filename
    842948