DocumentCode :
1337576
Title :
High performance fault-tolerant digital neural networks
Author :
Bettola, Simone ; Piuri, Vincenzo
Author_Institution :
Dipt. di Elettronica & Inf., Politecnico di Milano, Italy
Volume :
47
Issue :
3
fYear :
1998
fDate :
3/1/1998 12:00:00 AM
Firstpage :
357
Lastpage :
363
Abstract :
Efficient implementation of neural networks requires high-performance architectures, while VLSI realization for mission-critical applications must include fault tolerance. Contemporaneous solution of such problems has not yet been completely afforded in the literature. This paper focuses both on data representation to support high-performance neural computation and on error detection to provide the basic information for fault tolerance by using the redundant binary representation with a three-rail logic implementation. Costs and performances are evaluated referring to multilayered feed-forward networks
Keywords :
fault tolerant computing; feedforward neural nets; multilayer perceptrons; neural nets; ternary logic; data representation; digital neural networks; fault tolerance; fault-tolerant; high-performance architectures; multilayered feed-forward networks; three-rail logic; Computer architecture; Costs; Fault detection; Fault tolerance; Feedforward systems; Logic; Mission critical systems; Neural networks; Performance evaluation; Very large scale integration;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.660173
Filename :
660173
Link To Document :
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