• DocumentCode
    1340319
  • Title

    Estimating circuit activity in combinational CMOS digital circuits

  • Author

    Soeleman, Hendrawan ; Roy, Kaushik ; Chou, Tan-Li

  • Author_Institution
    Purdue Univ., West Lafayette, IN, USA
  • Volume
    17
  • Issue
    2
  • fYear
    2000
  • Firstpage
    112
  • Lastpage
    119
  • Abstract
    Largely because of the recent trend toward portable computing and wireless communication systems, estimating power consumption has become a major concern in today´s VLSI circuit and system design. Moreover, the dramatic decrease in feature size, combined with the corresponding increase in the number of devices on a chip, makes the power density larger. To be practical, a portable system should be able to operate for an extended period without requiring a batter recharge or replacement. Achieving this objective means minimizing power consumption. Fast and accurate probabilistic and statistical techniques for estimating circuit activity in CMOS digital circuits offer an alternative to circuit simulation. The techniques use statistics of input signals to determine accurate switching information
  • Keywords
    CMOS digital integrated circuits; circuit simulation; combinational circuits; power consumption; VLSI circuit; circuit activity; circuit simulation; combinational CMOS digital circuits; power consumption; switching information; CMOS digital integrated circuits; CMOS logic circuits; Capacitance; Circuit simulation; Computational modeling; Digital circuits; Energy consumption; Logic circuits; Logic gates; Power dissipation;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/54.844340
  • Filename
    844340