• DocumentCode
    1340787
  • Title

    Test Point Insertion with Control Points Driven by Existing Functional Flip-Flops

  • Author

    Yang, Joon-Sung ; Touba, Nur A. ; Nadeau-Dostie, Benoit

  • Author_Institution
    SungKyunKwan Univ., Suwon, South Korea
  • Volume
    61
  • Issue
    10
  • fYear
    2012
  • Firstpage
    1473
  • Lastpage
    1483
  • Abstract
    This paper presents a novel test point insertion method for pseudorandom built-in self-test (BIST) to reduce the area overhead. The proposed method replaces dedicated flip-flops for driving control points by existing functional flip-flops. For each control point, candidate functional flip-flops are identified by using logic cone analysis that investigates the path inversion parity, logical distance, and reconvergence from each control point. Four types of new control point structures are introduced based on the logic cone analysis results to avoid degrading the testability. Experimental results indicate that the proposed method significantly reduces test point area overhead by replacing the dedicated flip-flops and achieves essentially the same fault coverage as conventional test point implementations using dedicated flip-flops driving the control points.
  • Keywords
    built-in self test; flip-flops; logic design; BIST; functional flip-flops; logic cone analysis; logical distance; path inversion parity; pseudorandom built-in self-test; test point insertion; Built-in self-test; Circuit faults; Flip-flops; Inverters; Logic gates; Timing; Dedicated flip-flop; functional flip-flop; logic cone analysis; test point insertion.;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.2011.189
  • Filename
    6035679