DocumentCode :
1340833
Title :
Exploiting Core Working Sets to Filter the L1 Cache with Random Sampling
Author :
Etsion, Yoav ; Feitelson, Dror G.
Author_Institution :
Electr. Eng. & Comput. Sci. Faculties, Technion - Israel Inst. of Technol., Haifa, Israel
Volume :
61
Issue :
11
fYear :
2012
Firstpage :
1535
Lastpage :
1550
Abstract :
Locality is often characterized by working sets, defined by Denning as the set of distinct addresses referenced within a certain window of time. This definition ignores the fact that dramatic differences exist between the usage patterns of frequently used data and transient data. We therefore propose to extend Denning´s definition with that of core working sets, which identify blocks that are used most frequently and for the longest time. The concept of a core motivates the design of dual-cache structures that provide special treatment for the core. In particular, we present a probabilistic locality predictor for L1 caches that leverages the skewed popularity of blocks to distinguish transient cache insertions from more persistent ones. We further present a dual L1 design that inserts only frequently used blocks into a low-latency, low-power, direct-mapped main cache, while serving others from a small fully associative filter. To reduce the prohibitive cost of such a filter, we present a content addressable memory design that eliminates most of the costly lookups using a small auxiliary lookup table. The proposed design enables a 16K direct-mapped L1 cache, augmented with a small 2K filter, to outperform a 32K 4-way cache, while at the same time consumes 70-80 percent less dynamic power and 40 percent less static power.
Keywords :
cache storage; content-addressable storage; random processes; sampling methods; table lookup; L1 cache filter; content addressable memory design; core working sets; dual-cache structures; frequently used data; lookup table; probabilistic locality predictor; random sampling; transient data; usage patterns; Benchmark testing; Educational institutions; Histograms; Measurement; Power demand; Probabilistic logic; System performance; Benchmark testing; Core working sets; Educational institutions; Histograms; L1 cache; Measurement; Power demand; Probabilistic logic; System performance; cache filtering; cache insertion policy; dual-cache design; mass-count disparity; random insertion policy;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.2011.197
Filename :
6035687
Link To Document :
بازگشت