Title :
A 1.6-GHz CMOS PLL with on-chip loop filter
Author :
Parker, James F. ; Ray, Daniel
Author_Institution :
Level One Commun. Inc., Sacramento, CA, USA
fDate :
3/1/1998 12:00:00 AM
Abstract :
A 1.6-GHz phase locked loop (PLL) has been fabricated in a 0.6-μm CMOS technology. The PLL consists of an LC-tank circuit, divider, phase detector with charge pump, and an on-chip passive loop filter. When the oscillator is open loop, it exhibits -115 dBc/Hz phase noise at a 600-kHz offset from the carrier. The PLL occupies an active area of 1.6 mm2 and dissipates 90 mW from a single 3-V supply
Keywords :
CMOS analogue integrated circuits; UHF integrated circuits; integrated circuit noise; passive filters; phase locked loops; phase noise; 0.6 micron; 1.6 GHz; 3 V; 90 mW; CMOS PLL; LC-tank circuit; RF IC; charge pump; divider; on-chip passive loop filter; oscillator; phase detector; phase locked loop; phase noise; CMOS technology; Charge pumps; Circuits; Filters; Frequency conversion; Phase detection; Phase locked loops; Phase noise; Radio frequency; Voltage-controlled oscillators;
Journal_Title :
Solid-State Circuits, IEEE Journal of
