DocumentCode :
1341134
Title :
Variable supply-voltage scheme for low-power high-speed CMOS digital design
Author :
Kuroda, Tadahiro ; Suzuki, Kojiro ; Mita, Shinji ; Fujita, Tetsuya ; Yamane, Fumiyuki ; Sano, Fumihiko ; Chiba, Akihiko ; Watanabe, Yoshinori ; Matsuda, Koji ; Maeda, Takeo ; Sakurai, Takayasu ; Furuyama, Tohru
Author_Institution :
Syst. ULSI Eng. Lab., Toshiba Corp., Kawasaki, Japan
Volume :
33
Issue :
3
fYear :
1998
fDate :
3/1/1998 12:00:00 AM
Firstpage :
454
Lastpage :
462
Abstract :
This paper describes a variable supply-voltage (VS) scheme. From an external supply, the VS scheme automatically generates minimum internal supply voltages by feedback control of a buck converter, a speed detector, and a timing controller so that they meet the demand on its operation frequency. A 32-b RISC core processor is developed in a 0.4-μm CMOS technology which optimally controls the internal supple voltages with the VS scheme and the threshold voltages through substrate bias control. Performance in MIPS/W is improved by a factor of more than two compared with its conventional CMOS design
Keywords :
CMOS digital integrated circuits; circuit feedback; convertors; microprocessor chips; reduced instruction set computing; timing; voltage control; 0.4 micron; 32 bit; CMOS technology; RISC core processor; buck converter; feedback control; high-speed CMOS digital design; low-power CMOS digital design; speed detector; substrate bias control; threshold voltages; timing controller; variable supply-voltage scheme; Automatic generation control; Automatic voltage control; Buck converters; CMOS technology; Detectors; Feedback control; Optimal control; Threshold voltage; Timing; Voltage control;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.661211
Filename :
661211
Link To Document :
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