Title :
A 25 Ms/s 8-b-10 Ms/s 10-b CMOS data acquisition IC for digital storage oscilloscopes
Author :
Kusayanagi, Naoya ; Choi, Toru ; Hiwatashi, Masaya ; Segami, Masahiro ; Akasaka, Yasukazu ; Wakabayashi, Tadashi
Author_Institution :
Electron. Lab., Yokogawa Electr. Corp., Tokyo, Japan
fDate :
3/1/1998 12:00:00 AM
Abstract :
A data acquisition IC has been developed for digital storage oscilloscopes (DSOs). The entire DSO front-end except an input attenuator was integrated using 1-μm double-poly, double-metal (DPDM) CMOS process technology. In the analog-to-digital conversion, a time-interleaved successive approximation architecture effectively enables both 25 Ms/s 8-b and 10 Ms/s 10-b operation. The input signal conditioner consists of a variable gain amplifier (VGA) and a second-order programmable low-pass filter (LPF) using folded-cascode structures with current feedback circuits. The overall gain is externally controllable from 12 dB to 38 dB, and the bandwidth is programmable at 500 kHz, 5 MHz, and 25 MHz. The chip consumes 340 mW at the 25 Ms/s operating condition and less than 8 mW in the power-down mode from a single 5 V supply
Keywords :
CMOS integrated circuits; analogue-digital conversion; data acquisition; digital storage oscilloscopes; digital-analogue conversion; mixed analogue-digital integrated circuits; 1 micron; 10 bit; 12 to 38 dB; 340 mW; 5 V; 500 kHz to 25 MHz; 8 bit; 8 mW; CMOS data acquisition IC; DSO front-end; analog/digital conversion; current feedback circuits; digital storage oscilloscopes; double-metal CMOS process technology; folded-cascode structures; input signal conditioner; second-order programmable low-pass filter; time-interleaved successive approximation architecture; variable gain amplifier; Analog-digital conversion; Attenuators; CMOS digital integrated circuits; CMOS integrated circuits; CMOS process; CMOS technology; Data acquisition; Digital integrated circuits; Integrated circuit technology; Oscilloscopes;
Journal_Title :
Solid-State Circuits, IEEE Journal of
